In today's wireless radio systems, different mobile radio standards such as Global System for Mobile Communication (GSM), Enhanced Data Rates for GSM Evolution (EDGE) and Universal Mobile Telecommunications Standard (UMTS) are used. Data transmission in these and other systems is performed using radio frequency signals.
For generating, transmitting, or receiving of radio frequency signals, nowadays digitally controlled oscillators (DCOs) are used. A DCO generates a radio frequency signal depending on a digital frequency word. Realized in a semiconductor device, a digitally controlled phase locked loop (PLL) with a DCO uses less space than a respective PLL with an analog voltage controlled oscillator (VCO).
An oscillator signal which is generated by the DCO is provided directly or through a frequency divider to a second input of a phase and/or frequency detector which also receives a reference clock signal at a first input. The phase and/or frequency detector determines a digital error word which is, for example, provided to the DCO through a digital loop filter.
The detector, which can also be called a time to digital converter (TDC), usually measures a time difference between clock edges of the fed back oscillator signal and the reference clock signal. The accuracy of the measurement depends on the quality of the components used and external parameters such as temperature, for example. Accordingly, the TDC can comprise a delay locked loop (DLL) which is formed with analog components for the time measurement. A time resolution of a DLL is limited depending on technology caused switching times of the analog components. Furthermore, a conventional DLL uses non-negligible space on a semiconductor device, especially when providing a control unit to compensate for process, temperature and voltage variations.
In some conventional TDCs an array of DLLs is used to improve the time resolution, wherein the space needed on a semiconductor device increases quadratically with the desired resolution.